Design adders & other devices


  <1> implement a half-adder as a device 
  <2> use this half-adder to create other circuits such as: 
		full-adders and half-subtractors

  <3> implement a full adder as a device 
  <4> use the full adder device to implement a 4-bit parallel adder 
  <5> implement a 4-bit right shift register device
  <6> design a 4-bit multiplier circuit 
      using your 4-bit parallel adder and 4-bit right shift register


Lab Assignments

  1. Following the notes in the lab, you should have completed the half adder device.
    Use the device (the box) and connect binary probes and switches to ensure that the truth table is correct.
    Write the boolean functions for sum and carry beside the circuit


  2. As mentioned in the notes, a full adder can be designed using two "Half Adder" devices and one additional gate.
    (Hint ci+1= the sum of the carries out of the two half adders).
    Build and test your circuit with the truth table.
    Write the boolean functions for sum and the carry beside the circuit.
    Build a full adder device and test it. You will need it to build a 4-bit parallel adder.


  3. Build a 4-bit parallel adder device by using four "Full Adder" devices.
    For this, you will use the "Full Adder" device that you just built in the last step.
    Test your 4-bit parallel adder device with the following examples:
    	  0101 + 0010 = ?
              0110 + 0011 = ?
              and any other examples of your choice


  4. Build a 4-bit right shift register device using four D-flip-flops and some one-bit tri-state buffers.
    Make sure that you have a LD control over it.
    When LD = 0, your register will be able to do parallel loading.
    When LD = 1, it will be able to shift right one bit (i.e. SI -> Q3 -> Q2 -> Q1 -> Q0).

    Here is some info about the one-bit tri-state buffer for your reference:
    1).A one-bit tri-state buffer can be obtained from the "Simulation Logic.clf" libruary.
    2).A testing circuit and its truth table are as follows:


  5. Design a 4-bit multiplier using your 4-bit parallel adder device and the 4-bit right shift register device above with an additional D-flip-flop.

Copyright: Department of Computer Science, University of Regina.