The following control signals will be required for our one bit CPU in this lab:
In the above diagram you notice that there is no address buffer or data buffer, no flags coming out of the ALU and are ignoring many of the registers. These simplifications make the problem manageable while still illustrating many principles. In addition, an external input (a switch) has been added to allow us to input values to the CPU bus for testing purposes. With the CPU built we will execute micro-operations to make the circuit execute instructions. Each register stores one bit of data and requires two control signals. Register-in loads the register with the contents of the bus. Register-out enables the tri-state buffer in the register which lets the register's output onto the bus. The ALU performs two operations, XOR and AND. The operation to be performed is to be determined by the code in the IR. A 0 in the IR indicates a XOR operation and a 1 indicates an AND operation.
ACCout, ACCin, TEMPout, TEMPin, ALUout, IRin, Bout, Bin, Cout, Cin, EXTout.A control unit would normally generate these control signals but in our case switches will be used for these control signals.
To avoid this problem we use a device called a tri-state buffer,
which besides the states 0 and 1 has a floating third state.
These can be used to connect several devices to a bus as the diagram below illustrates.
The tri-state buffers (buffer-1 T.S. in Simulation Logic library)
are held in the floating
state except when that device wants to take control of the bus.
If more than one device tries to take control of the bus there will still be a conflict problem.
Here is the truth table and the symbol of a tri-state buffer:
Use the LogicWorks Signal tool to draw a bus line and then incorporate tri-state devices in the circuit.
Here is how part of the circuit for the 1 bit CPU should appear.
Many devices may be connected to a common bus by using tri-state buffers. You may build a 1-bit CPU as described above to get ready for your lab assignment - Build a 2-bit CPU.