CS301 Lab: Using VHDL to Describe Mutiplexers

Objectives of this lab:


	To learn more about VHDL Syntax structures.
	To create VHDL Models with LogicWorks 5 and build 
	circuits to test your multiplexers.

Preparation


	Read lab lecture notes. 

Lab Assignments

1. Build an 8-to-1 Multiplexer device with a VHDL Model.

2. Build a quadruple 8-to-1 Multiplexer device with a VHDL Model.


Questions


  1. What defines whether a multiplexer application is time-dependent or not? 
  2. What additional component can be added to make a MUX application 
     time-dependent?


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