1. What are three ways of creating a MUX in VHDL (outlined by the notes)?
  2. Implement a 8 to 1 MUX in VHDL for each of these three ways. (Create three .dwv files).
  3. What is the difference between a "case" statement and a "select" statement? Hint: how does the code respond to changes in the input (or d) lines for these two implementations?


  1. How do you change the shape of a part in LogicWorks?